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Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)
A Hybrid Distributed Test Generation Method Using Deterministic and Genetic Algorithms
Banff, Alberta, Canada
July 20-July 24
ISBN: 0-7695-2403-6
ASCII Text
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Haidar Harmanani, Bassem Karablieh, "A Hybrid Distributed Test Generation Method Using Deterministic and Genetic Algorithms," System-on-Chip for Real-Time Applications, International Workshop on, pp. 317-322, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05), 2005.
 
 
BibTex
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@article{ 10.1109/IWSOC.2005.13,
author = {Haidar Harmanani and Bassem Karablieh},
title = {A Hybrid Distributed Test Generation Method Using Deterministic and Genetic Algorithms},
journal ={System-on-Chip for Real-Time Applications, International Workshop on},
volume = {0},
year = {2005},
isbn = {0-7695-2403-6},
pages = {317-322},
doi = {http://doi.ieeecomputersociety.org/10.1109/IWSOC.2005.13},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - System-on-Chip for Real-Time Applications, International Workshop on
TI - A Hybrid Distributed Test Generation Method Using Deterministic and Genetic Algorithms
SN - 0-7695-2403-6
SP317
EP322
A1 - Haidar Harmanani,
A1 - Bassem Karablieh,
PY - 2005
KW - null
VL - 0
JA - System-on-Chip for Real-Time Applications, International Workshop on
ER -
 
Haidar Harmanani, Lebanese American University
Bassem Karablieh, Lebanese American University
Test generation is a highly complex and time-consuming task. In this work, we present a distributed method for combinational test generation. The method is based on a hybrid approach that combines both deterministic and genetic approaches. The deterministic phase is based on the D-algorithm and generates an initial set of test vectors that are evolved in the genetic phase in order to achieve a high fault coverage in a short time. The algorithm is parallelized based on a cluster of workstations using the Message Passing Interface (MPI) library. Several benchmark circuits were attempted, and favorable results comparisons are reported.
Citation:
Haidar Harmanani, Bassem Karablieh, "A Hybrid Distributed Test Generation Method Using Deterministic and Genetic Algorithms," iwsoc, pp.317-322, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05), 2005
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