Very High Radix Scalable Montgomery Multipliers

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Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)

Banff, Alberta, Canada

July 20-July 24

ISBN: 0-7695-2403-6

	ASCII Text	x
	Kyle Kelley, David Harris, "Very High Radix Scalable Montgomery Multipliers," System-on-Chip for Real-Time Applications, International Workshop on, pp. 400-404, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05), 2005.

	BibTex	x
	@article{ 10.1109/IWSOC.2005.111, author = {Kyle Kelley and David Harris}, title = {Very High Radix Scalable Montgomery Multipliers}, journal ={System-on-Chip for Real-Time Applications, International Workshop on}, volume = {0}, year = {2005}, isbn = {0-7695-2403-6}, pages = {400-404}, doi = {http://doi.ieeecomputersociety.org/10.1109/IWSOC.2005.111}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - System-on-Chip for Real-Time Applications, International Workshop on TI - Very High Radix Scalable Montgomery Multipliers SN - 0-7695-2403-6 SP400 EP404 A1 - Kyle Kelley, A1 - David Harris, PY - 2005 KW - null VL - 0 JA - System-on-Chip for Real-Time Applications, International Workshop on ER -

Kyle Kelley, Harvey Mudd College

David Harris, Harvey Mudd College

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IWSOC.2005.111

This paper describes a very high radix scalable Montgomery multiplier. It extends the radix-2 Tenca-Ko? scalable architecture using w ? v-bit integer multipliers in place of AND gates. The new design can perform 1024-bit modular exponentiation in 6.6 ms using 2847 4-input lookup tables and 32 16 x 16 multipliers, making it the fastest scalable design yet reported.

Citation:

Kyle Kelley, David Harris, "Very High Radix Scalable Montgomery Multipliers," iwsoc, pp.400-404, Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05), 2005

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