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The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03)
A QoS Internet Protocol Scheduler on the IXP1200 Network Platform
Calgary, Alberta, Canada
June 30-July 02
ISBN: 0-7695-1944-X
ASCII Text
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F. De Bernardinis, L. Fanucci, T. Ramacciotti, P. Terreni, "A QoS Internet Protocol Scheduler on the IXP1200 Network Platform," System-on-Chip for Real-Time Applications, International Workshop on, pp. 394, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 2003.
 
 
BibTex
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@article{ 10.1109/IWSOC.2003.1213069,
author = {F. De Bernardinis and L. Fanucci and T. Ramacciotti and P. Terreni},
title = {A QoS Internet Protocol Scheduler on the IXP1200 Network Platform},
journal ={System-on-Chip for Real-Time Applications, International Workshop on},
volume = {0},
year = {2003},
isbn = {0-7695-1944-X},
pages = {394},
doi = {http://doi.ieeecomputersociety.org/10.1109/IWSOC.2003.1213069},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - System-on-Chip for Real-Time Applications, International Workshop on
TI - A QoS Internet Protocol Scheduler on the IXP1200 Network Platform
SN - 0-7695-1944-X
SP
EP
A1 - F. De Bernardinis,
A1 - L. Fanucci,
A1 - T. Ramacciotti,
A1 - P. Terreni,
PY - 2003
KW - null
VL - 0
JA - System-on-Chip for Real-Time Applications, International Workshop on
ER -
 
F. De Bernardinis, DEIT, University of Pisa
L. Fanucci, IEIIT-CNR
T. Ramacciotti, DEIT, University of Pisa
P. Terreni, DEIT, University of Pisa
In this paper we describe the implementation of a scheduler capable of Quality of Service (QoS) management on the Intel IXP 1200 network processor. First, the scheduling algorithm PTTSD is introduced at the abstract level showing its characteristics and complexity. Then, the IXP architecture is briefly described with the purpose of refining the PTTSD algorithm in order to provide a more efficient implementation. The refined PTTSD scheduler has been implemented on top of the reference design provided by Intel. The dependency of the adopted software architecture on the IXP network processor is analyzed and, finally, the implementation is described. A set of characterization tests is reported to demonstrate the efficiency of the implementation and the effectiveness of the Intel architecture to implement flexible QoS routers.
Citation:
F. De Bernardinis, L. Fanucci, T. Ramacciotti, P. Terreni, "A QoS Internet Protocol Scheduler on the IXP1200 Network Platform," iwsoc, pp.394, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 2003
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