This paper describes the purpose of development for RtrASSoc, an Adaptable, Superscalar and Reconfigurable System on Chip. The RtrASSoc will be used in Embedded Systems that need capacity, performance, and low cost, based on Programmable System-on-Chip (PSOC), where part of the system will be a embedded superscalar processor (ESP), another part will be a Embedded Operating System (EOS), and finally a reconfigurable part where a reconfigurable routines (RR) can be reconfigured, extracted from the application program. A C-compiler extract the reconfigurable routines from the application program and fix the parameters for reconfiguration that will be used during the execution of the application. The system will be tested in recognition pattern applications in a FPGA Virtex from Xilinx.