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The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03)
High Level Modeling and Simulation of a VDSL Modem in SystemC 2.0 - IPsim
Calgary, Alberta, Canada
June 30-July 02
ISBN: 0-7695-1944-X
ASCII Text
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Armando Armaroli, Marcello Coppola, Mario Diaz Nava, Luca Luca Fanucci, "High Level Modeling and Simulation of a VDSL Modem in SystemC 2.0 - IPsim," System-on-Chip for Real-Time Applications, International Workshop on, pp. 175, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 2003.
 
 
BibTex
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@article{ 10.1109/IWSOC.2003.1213030,
author = {Armando Armaroli and Marcello Coppola and Mario Diaz Nava and Luca Luca Fanucci},
title = {High Level Modeling and Simulation of a VDSL Modem in SystemC 2.0 - IPsim},
journal ={System-on-Chip for Real-Time Applications, International Workshop on},
volume = {0},
year = {2003},
isbn = {0-7695-1944-X},
pages = {175},
doi = {http://doi.ieeecomputersociety.org/10.1109/IWSOC.2003.1213030},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - System-on-Chip for Real-Time Applications, International Workshop on
TI - High Level Modeling and Simulation of a VDSL Modem in SystemC 2.0 - IPsim
SN - 0-7695-1944-X
SP
EP
A1 - Armando Armaroli,
A1 - Marcello Coppola,
A1 - Mario Diaz Nava,
A1 - Luca Luca Fanucci,
PY - 2003
KW - null
VL - 0
JA - System-on-Chip for Real-Time Applications, International Workshop on
ER -
 
Armando Armaroli, DEIT, University of Pisa
Marcello Coppola, STMicroelectronics
Mario Diaz Nava, STMicroelectronics rue Jules Horowith, 12
Luca Luca Fanucci, IEIIT-CNR
In order to deal with present System on Chip design complexity and short time to market, system level specification/verification techniques and reusable Intellectual Property cores are key factors. To this aim, system level C++ object oriented methodology named IPsim has been developed as a C++ library on top SystemC 2.0. In this paper, the IPsim modeling and simulation of a VDSL modem is presented. Moreover, quantitative comparison between IPsim and behavioral VHDL simulation speed is also performed.
Citation:
Armando Armaroli, Marcello Coppola, Mario Diaz Nava, Luca Luca Fanucci, "High Level Modeling and Simulation of a VDSL Modem in SystemC 2.0 - IPsim," iwsoc, pp.175, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 2003
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