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The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03)
High-performance crossbar design for system-on-chip
Calgary, Alberta, Canada
June 30-July 02
ISBN: 0-7695-1944-X
Panduka Wijetunga, University of Southern California, Los Angeles, CA 90089
A new low-swing pass-transistor logic style for designing high-performance crossbar switches for system-on-chip applications is proposed. The new passtransistor architecture uses current-switching and end-to end swing restoration to improve the crossbar performance. The architecture is verified in 0.35 and 0.25 ?m CMOS technology. The 4-b 4?4 crossbar switch in 0.35 ?m CMOS occupied an area of 1.4 ?m2 and achieved 36 Gb/s. Analysis suggests that the new logic style can be used to design multi-Tb/s crossbar switches in 0.18 ?m and lower CMOS technology.
Citation:
Panduka Wijetunga, "High-performance crossbar design for system-on-chip," iwsoc, pp.138, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 2003
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