A 5.8-GHz High Efficient, Low Power, Low Phase Noise CMOS VCO for IEEE 802.11a

I
IWSOC
2003
The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03)
Abstract - A 5.8-GHz High Efficient, Low Power, Low Phase Noise CMOS VCO for IEEE 802.11a

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The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03)

Calgary, Alberta, Canada

June 30-July 02

ISBN: 0-7695-1944-X

	ASCII Text	x
	Sau-Mou Wu, Ron-Yi Liu, Wei-Liang Chen, "A 5.8-GHz High Efficient, Low Power, Low Phase Noise CMOS VCO for IEEE 802.11a," System-on-Chip for Real-Time Applications, International Workshop on, pp. 94, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 2003.

	BibTex	x
	@article{ 10.1109/IWSOC.2003.1213013, author = {Sau-Mou Wu and Ron-Yi Liu and Wei-Liang Chen}, title = {A 5.8-GHz High Efficient, Low Power, Low Phase Noise CMOS VCO for IEEE 802.11a}, journal ={System-on-Chip for Real-Time Applications, International Workshop on}, volume = {0}, year = {2003}, isbn = {0-7695-1944-X}, pages = {94}, doi = {http://doi.ieeecomputersociety.org/10.1109/IWSOC.2003.1213013}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - System-on-Chip for Real-Time Applications, International Workshop on TI - A 5.8-GHz High Efficient, Low Power, Low Phase Noise CMOS VCO for IEEE 802.11a SN - 0-7695-1944-X SP EP A1 - Sau-Mou Wu, A1 - Ron-Yi Liu, A1 - Wei-Liang Chen, PY - 2003 KW - null VL - 0 JA - System-on-Chip for Real-Time Applications, International Workshop on ER -

Sau-Mou Wu, Yuan-Ze University

Ron-Yi Liu, Yuan-Ze University

Wei-Liang Chen, Yuan-Ze University

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/IWSOC.2003.1213013

A high efficient, low power and low phase noise 5.8GHz LC voltage-controlled oscillator (VCO) for IEEE 802.11a WLAN applications is designed and fabricated in TSMC 0.25um 1P5M CMOS process. With single 2.5V supply, it has a tuning range of 240MHz and a phase noise of - 115dBc/Hz at 1MHz offset from center frequency throughout the tuning range. The total power consumption is 6.23mW while the VCO core consumes only 2.62mW. Compared with the recent proposed works by using the power-frequency-normalized (PFN) figure of merit, it shows a superior phase noise performance while with very low power consumption.

Citation:

Sau-Mou Wu, Ron-Yi Liu, Wei-Liang Chen, "A 5.8-GHz High Efficient, Low Power, Low Phase Noise CMOS VCO for IEEE 802.11a," iwsoc, pp.94, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 2003

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