The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03) InterconnectionModelling Using Distributed RLC Models Calgary, Alberta, Canada June 30-July 02 ISBN: 0-7695-1944-X
In physical design software, it is often necessary to estimate net i.e. interconnection delays. Interconnections are typically modelled as lumped RC circuits. This approximation is reasonable in technologies where overall delay is dominated by gate delays. With present sub 130 nm technologies, characteristic signal propagation lengths are comparable to signal wavelengths. Interconnections no longer allow currents to flow through efficiently, resulting in a conspiracy of capacitative, resistive and inductive effects. In recent years, more accurate interconnection models, that approximate an interconnection as _ distributed RLC segments, have been devised. In this work, we let the number of segments go to infinity and obtain exact expressions for voltages. In particular, we present a mathematically rigorous time-domain analysis of the Lossy Transmission Line Model.
Citation:
Dorothy Kucar, Anthony Vannelli, "InterconnectionModelling Using Distributed RLC Models," iwsoc, pp.32, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 2003 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||