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2010 Seventh International Conference on Information Technology
Designing Efficient Many-Core Parallel Algorithms for All-Pairs Shortest-Paths Using CUDA
Las Vegas, Nevada, USA
April 12-April 14
ISBN: 978-0-7695-3984-3
Finding the all-pairs shortest-paths on a large graph is a fundamental problem in many practical applications such as bioinformatics, internet node traffic and network routing. In this paper, we present the designs of two efficient parallel algorithms for many-core GPUs using CUDA. Our algorithms expose substantial fine-grained parallelism while maintaining minimal global communication. By using the global scope of the GPU's global memory, coalescing the global memory reads and writes, and avoiding on-chip shared memory bank conflicts, we are able to achieve a large performance benefit with a speed-up of 2,500x on a desktop computer in comparison with a single core program. Our algorithms are scalable, which can handle graphs with size larger than the memory available on the GPUs and when multiple GPUs are added into the system.
Index Terms:
Multi-core, Multi-threaded Algorithms, Graph Algorithms
Citation:
Quoc-Nam Tran, "Designing Efficient Many-Core Parallel Algorithms for All-Pairs Shortest-Paths Using CUDA," itng, pp.7-12, 2010 Seventh International Conference on Information Technology, 2010
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