Fifth International Conference on Information Technology: New Generations (itng 2008) Hardware Synthesis for Reconfigurable Heterogeneous Pipelined Accelerators April 07-April 09 ISBN: 978-0-7695-3099-4
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ITNG.2008.65
This paper discusses a method of hardware synthesis for re-configurable heterogeneous pipelined accelerators and corresponding EDA-tool that we developed. To evaluate the method and tool, we performed experiments using several representative image and signal processing cases. The experiments showed that our tool is able to automatically construct an optimized hardware that favorably compares to the hardware constructed by skilled human designers, but the tool does it several orders of magnitude faster than a human designer.
Index Terms:
re-configurable computing, heterogeneous pipelined accelerators, hardware synthesis, EDA-tool
Citation:
Lech J?zwiak, Alexander Douglas, "Hardware Synthesis for Reconfigurable Heterogeneous Pipelined Accelerators," itng, pp.1123-1130, Fifth International Conference on Information Technology: New Generations (itng 2008), 2008 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||