International Conference on Information Technology (ITNG'07) A Study of Dynamic Branch Predictors: Counter versus Perceptron Las Vegas, Nevada, USA April 02-April 04 ISBN: 0-7695-2776-0
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ITNG.2007.22
As the instruction issue rate and depth of pipelining increase, branch prediction is considered as a performance hurdle for modern processors. Extremely high branch prediction accuracy is essential to deliver their potential performance. Many strategies have been investigated to improve the dynamic branch prediction. Among them, those using 2-bit saturating up-down counter and those using perceptron have dominated over other predictors. This paper presents comparison between counter-based branch predictor and perceptron-based branch predictor and discusses the future developments of dynamic branch prediction.
Citation:
C. Y. Ho, K. F. Chong, C. H. Yau, Anthony S. S. Fong, "A Study of Dynamic Branch Predictors: Counter versus Perceptron," itng, pp.528-536, International Conference on Information Technology (ITNG'07), 2007 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||