Third International Conference on Information Technology: New Generations (ITNG'06) An Embedded Processor for a Pairing-Based Cryptosystem Las Vegas, Nevada April 10-April 12 ISBN: 0-7695-2497-4
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ITNG.2006.29
In recent times bilinear pairings have been instrumental in the design of many new cryptographic protocols and have provided elegant solutions to existing protocol problems. The ? pairing is one such pairing and is an efficient computation technique based on a generalization of the Duursma Lee method for calculating the Tate pairing. The pairing can be computed very efficiently on genus 2 hyperelliptic curves. In this paper it is demonstrated that this pairing operation is well suited to a dedicated parallel hardware implementation on an FPGA. An ? pairing processor is described in detail and the architectures required for such a system are discussed. Prototype implementation results are presented over a base field of F_2^103 and the advantages of implementing the pairing on the dedicated processor are discussed
Index Terms:
pairing-based cryptosystem, ? pairing, genus 2 hyperelliptic, characteristic 2, dedicated processor
Citation:
Robert Ronan, Colm O hEigeartaigh, Colin Murphy, Michael Scott, Tim Kerins, W.P. Marnane, "An Embedded Processor for a Pairing-Based Cryptosystem," itng, pp.192-197, Third International Conference on Information Technology: New Generations (ITNG'06), 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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