International Test Conference 2004 (ITC'04) I/O Self-Leakage Test Charlotte, NC, USA October 26-October 28 ISBN: 0-7803-8581-0
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ITC.2004.88
This paper presents the implementation of the Self- Leakage Test, a new approach for unconnected I/O leakage testing. It provides a path for leakage current through the on-chip leakers and uses the voltage drop at the pad to detect a pass/fail condition. A detailed methodology for defining the self-leakage test specifications has been developed. Preliminary silicon data shows that selfleakage test methodology provide a viable method for high-volume monitoring of I/O leakage at minimal on-die DFT (Design-For-Test) overhead.
Citation:
Ali Muhtaroglu, Benoit Provost, Tawfik Rahal-Arabi, Greg Taylor, "I/O Self-Leakage Test," itc, pp.903-906, International Test Conference 2004 (ITC'04), 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||