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International Test Conference 2004 (ITC'04)
Hierarchical DFT Methodology - A Case Study
Charlotte, NC, USA
October 26-October 28
ISBN: 0-7803-8581-0
ASCII Text
x 
 
Jeff Remmers, Moe Villalba, Richard Fisette, "Hierarchical DFT Methodology - A Case Study," Test Conference, International, pp. 847-856, International Test Conference 2004 (ITC'04), 2004.
 
 
BibTex
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@article{ 10.1109/ITC.2004.85,
author = {Jeff Remmers and Moe Villalba and Richard Fisette},
title = {Hierarchical DFT Methodology - A Case Study},
journal ={Test Conference, International},
volume = {0},
year = {2004},
issn = {1089-3539},
pages = {847-856},
doi = {http://doi.ieeecomputersociety.org/10.1109/ITC.2004.85},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Test Conference, International
TI - Hierarchical DFT Methodology - A Case Study
SN - 1089-3539
SP847
EP856
A1 - Jeff Remmers,
A1 - Moe Villalba,
A1 - Richard Fisette,
PY - 2004
KW - null
VL - 0
JA - Test Conference, International
ER -
 
Jeff Remmers, Plexus Design Solutions, Inc., Sudbury, MA
Moe Villalba, Plexus Design Solutions, Inc., Sudbury, MA
Richard Fisette, Mentor Graphics Corporation, Waltham, MA
A hierarchical approach to DFT is presented to address the issues encountered when inserting DFT into large SOC designs. The case study uses a production design with Sandburst, Inc ( 0.13?, 4M gate chip).
Citation:
Jeff Remmers, Moe Villalba, Richard Fisette, "Hierarchical DFT Methodology - A Case Study," itc, pp.847-856, International Test Conference 2004 (ITC'04), 2004
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