International Test Conference 2004 (ITC'04) A Code-less BIST Processor for Embedded Test and in-system configuration of Boards and Systems Charlotte, NC, USA October 26-October 28 ISBN: 0-7803-8581-0
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ITC.2004.6
A code-less processor that enables designers to achieve optimal in-system FPGA configuration as well as embed built-in self-test capabilities into boards and systems is presented. This system BIST architecture enables designers to lower system costs and design effort while satisfying test and field engineering requirements for simplified product test.
Citation:
CJ Clark, Mike Ricchetti, "A Code-less BIST Processor for Embedded Test and in-system configuration of Boards and Systems," itc, pp.857-866, International Test Conference 2004 (ITC'04), 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||