International Test Conference 2004 (ITC'04) Reducing Measurement Uncertainty in a DSP-Based Mixed-Signal Test Environment without Increasing Test Time Charlotte, NC, USA October 26-October 28 ISBN: 0-7803-8581-0
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ITC.2004.151
Noise, especially clock jitter effects, in a DSPbased mixed-signal test system severely limits its measurement accuracy. This is especially acute in high-frequency sampling systems. This paper illustrates an efficient method to improve measurement accuracy and precision by reducing the uncertainty of a DSP-based measurement without an increase in test time. A new digitizer architecture is introduced. The digitizer was fabricated in a 0.18 ?m CMOS process. Experimental results were obtained validating the proposed technique.
Citation:
C. Taillefer, G.W. Roberts, "Reducing Measurement Uncertainty in a DSP-Based Mixed-Signal Test Environment without Increasing Test Time," itc, pp.953-962, International Test Conference 2004 (ITC'04), 2004 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||