International Test Conference 2004 (ITC'04)
On-Chip Impulse Response Generation for Analog and Mixed-Signal Testing
Charlotte, NC, USA
October 26-October 28
ISBN: 0-7803-8581-0
DOI Bookmark:
http://doi.ieeecomputersociety.org/10.1109/ITC.2004.130
A technique for testing analog and mixed-signal linear circuit components based on their impulse response (IR) signatures is presented in this paper. A simple DFT structure is proposed to enable the on-chip generation of the impulse response signatures from the corresponding step responses of the circuit components. The proposed technique circumvents the need to apply pseudorandom patterns and perform complex on-chip cross-correlation for IR generation. A set of post processing steps based on cross/auto-correlation are proposed to efficiently compare IR signatures. A statistical approach based on linear regression and outlier analysis is used for defect screening. A continuous-time active state variable filter benchmark circuit is used as the Device-Under-Test as a means of validating this technique. The detection sensitivity for shorting and open resistive faults across various defect severity levels is analyzed. The detection results are compared and shown to be superior to a typical specification based test.
Citation:
Abhishek Singh, Chintan Patel, Jim Plusquellic, "On-Chip Impulse Response Generation for Analog and Mixed-Signal Testing," itc, pp.262-270, International Test Conference 2004 (ITC'04), 2004
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