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IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07)
Two Novel Approaches to Online Partial Bitstream Relocation in a Dynamically Reconfigurable System
Porto Alegre, Brazil
March 09-March 11
ISBN: 0-7695-2896-1
S. Corbetta, DEI - Politecnico di Milano
F. Ferrandi, DEI - Politecnico di Milano
M. Morandi, DEI - Politecnico di Milano
M. Novati, DEI - Politecnico di Milano
M.D. Santambrogio, DEI - Politecnico di Milano
D. Sciuto, DEI - Politecnico di Milano
FPGAs allow the creation of partially reconfigurable systems; when compared to traditional reconfigurable systems based on total reconfiguration, recent approaches offer significant innovations. One of these is the possibility of dynamically change the functionalities hosted on the device only when needed and while the rest of the system keeps working. This permits better performance but increases the complexity of both module creation and placement. This paper describes and compares two different solutions, a HW and a SW one, to perform bitstream relocation: BiRF and BAnMaT Light. The former is a hardware filter in the fixed part of the reconfigurable architecture, the latter is a software solution, run on the internal processor of the FPGA.
Citation:
S. Corbetta, F. Ferrandi, M. Morandi, M. Novati, M.D. Santambrogio, D. Sciuto, "Two Novel Approaches to Online Partial Bitstream Relocation in a Dynamically Reconfigurable System," isvlsi, pp.457-458, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), 2007
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