The development of embedded systems is getting more complex. With severe power constraints and with the necessity of shrinking time-to-market, designers face the challenge of increasing the performance to sustain new functionalities added day by day. Dataflow architectures appears to be one solution, presenting huge performance improvements. However, they are highly dependent of its compiler to adapt the binary code to be executed on them. Because of this, dataflow architectures are not suitable for the embedded domain, since legacy code must still be executed in new machines. This way, we propose a hybrid architecture, mixing reconfigurable and dataflow systems. To compose this architecture we coupled to a dataflow machine two small pieces of hardware: a very simple processor responsible for executing control instructions, and a hardware mechanism to detect and transform, at run time, instructions to be executed on the dataflow machine. As will be shown, we are able to take advantage of performance boosts presented by dataflow architectures, lowering the energy consumption and most importantly, allowing reuse of binary code without any kind of modification in a totally transparent process.