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IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07)
Technological hybridization for efficient runtime reconfigurable FPGAs
Porto Alegre, Brazil
March 09-March 11
ISBN: 0-7695-2896-1
N. Bruchon, University of Montpellier 2, Montpellier Cedex 5, France
L. Torres, University of Montpellier 2, Montpellier Cedex 5, France
G. Sassatelli, University of Montpellier 2, Montpellier Cedex 5, France
G. Cambon, University of Montpellier 2, Montpellier Cedex 5, France
The goal of this paper is to propose an FPGA using emerging non volatile technologies for its configuration memory. Studies on magnetic memories have already been carried out [1] but solid electrolyte and phase change memories are also good candidates for such type of application. Features of these technologies can provide some interesting characteristics to the FPGA such as short writing time with non volatile technology. A small structure (RSRAM) for Remanent SRAM is used to convert information from these technologies into electrical information. This structure naturally provides some more features like partial and shadowed reconfiguration.
Citation:
N. Bruchon, L. Torres, G. Sassatelli, G. Cambon, "Technological hybridization for efficient runtime reconfigurable FPGAs," isvlsi, pp.29-34, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), 2007
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