IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07) Subthreshold Pass Transistor Logic for Ultra-Low Power Operation Porto Alegre, Brazil March 09-March 11 ISBN: 0-7695-2896-1
In this paper, we investigate subthreshold pass-transistor logics for ultra-low-power applications. The performance characteristics of different pass-transistor XOR structures operating in the subthreshold region have been compared in 65nm and 90nm technologies. The results of the simulations show that the subthreshold logics have some advantages compared to their strong inversion counterparts. The study includes both normal subthreshold pass-transistor logic (sub-PT) and dynamic threshold pass-transistor logic (sub-DTPT). When compared to the former, the latter logic reveals lower sensitivities to temperature and process variations.
Citation:
Vahid , Ali Afzali-Kusha, "Subthreshold Pass Transistor Logic for Ultra-Low Power Operation," isvlsi, pp.490-491, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), 2007 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||