Design of a Novel CNTFET-based Reconfigurable Logic Gate

I
ISVLSI
2007
IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07)
Abstract - Design of a Novel CNTFET-based Reconfigurable Logic Gate

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IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07)

Porto Alegre, Brazil

March 09-March 11

ISBN: 0-7695-2896-1

	ASCII Text	x
	J. Liu, I. O?Connor, D. Navarro, F. Gaffiot, "Design of a Novel CNTFET-based Reconfigurable Logic Gate," VLSI, IEEE Computer Society Annual Symposium on, pp. 285-290, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), 2007.

	BibTex	x
	@article{ 10.1109/ISVLSI.2007.39, author = {J. Liu and I. O?Connor and D. Navarro and F. Gaffiot}, title = {Design of a Novel CNTFET-based Reconfigurable Logic Gate}, journal ={VLSI, IEEE Computer Society Annual Symposium on}, volume = {0}, year = {2007}, isbn = {0-7695-2896-1}, pages = {285-290}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2007.39}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI, IEEE Computer Society Annual Symposium on TI - Design of a Novel CNTFET-based Reconfigurable Logic Gate SN - 0-7695-2896-1 SP285 EP290 A1 - J. Liu, A1 - I. O?Connor, A1 - D. Navarro, A1 - F. Gaffiot, PY - 2007 KW - null VL - 0 JA - VLSI, IEEE Computer Society Annual Symposium on ER -

J. Liu, Institut des Nanotechnologies de Lyon (INL), France

I. O?Connor, Institut des Nanotechnologies de Lyon (INL), France

D. Navarro, Institut des Nanotechnologies de Lyon (INL), France

F. Gaffiot, Institut des Nanotechnologies de Lyon (INL), France

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2007.39

This paper describes a dynamically reconfigurable 8-function logic gate (CNT-DR8F) based on a doublegate carbon nanotube field effect transistor (DGCNTFET). The design is based on a property specific to this device: ambivalence, enabling p-type or n-type behavior depending on the back-gate voltage. Using available models, CNT-DR8F is simulated and analyzed at 20GHz operation. We also give an example functional block (full adder) to show how to construct logic circuits based on the association of physically identical reconfigurable logic cells.

Citation:

J. Liu, I. O?Connor, D. Navarro, F. Gaffiot, "Design of a Novel CNTFET-based Reconfigurable Logic Gate," isvlsi, pp.285-290, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), 2007

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