Design of a MCML Gate Library Applying Multiobjective Optimization

I
ISVLSI
2007
IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07)
Abstract - Design of a MCML Gate Library Applying Multiobjective Optimization

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	Similar Articles Articles by Roberto Pereira-Arroyo Articles by Pablo Alvarado-Moya Articles by Wolfgang H. Krautschneider

IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07)

Porto Alegre, Brazil

March 09-March 11

ISBN: 0-7695-2896-1

	ASCII Text	x
	Roberto Pereira-Arroyo, Pablo Alvarado-Moya, Wolfgang H. Krautschneider, "Design of a MCML Gate Library Applying Multiobjective Optimization," VLSI, IEEE Computer Society Annual Symposium on, pp. 81-85, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), 2007.

	BibTex	x
	@article{ 10.1109/ISVLSI.2007.38, author = {Roberto Pereira-Arroyo and Pablo Alvarado-Moya and Wolfgang H. Krautschneider}, title = {Design of a MCML Gate Library Applying Multiobjective Optimization}, journal ={VLSI, IEEE Computer Society Annual Symposium on}, volume = {0}, year = {2007}, isbn = {0-7695-2896-1}, pages = {81-85}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2007.38}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI, IEEE Computer Society Annual Symposium on TI - Design of a MCML Gate Library Applying Multiobjective Optimization SN - 0-7695-2896-1 SP81 EP85 A1 - Roberto Pereira-Arroyo, A1 - Pablo Alvarado-Moya, A1 - Wolfgang H. Krautschneider, PY - 2007 KW - null VL - 0 JA - VLSI, IEEE Computer Society Annual Symposium on ER -

Roberto Pereira-Arroyo, Costa Rica Institute of Technology, Costa Rica

Pablo Alvarado-Moya, Costa Rica Institute of Technology, Costa Rica

Wolfgang H. Krautschneider, Costa Rica Institute of Technology, Costa Rica

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2007.38

In this paper, the problem of sizing MOS Current Mode Logic (MCML) circuits is addressed. The Pareto front is introduced as a useful analysis tool to explore the design space of each gate that is part of our MCML basic library. A genetic algorithm (GA) is employed to automatically detect this front in a process that efficiently finds optimal parameterizations and their corresponding values in an aggregate fitness space. Measures of the power consumption, propagation delay and output voltage swing are used as fitness functions, since the problem is treated as a multiobjective optimization task. Finally, the results of postlayout simulations, using the AMS 0.35 ?m technology are presented.

Citation:

Roberto Pereira-Arroyo, Pablo Alvarado-Moya, Wolfgang H. Krautschneider, "Design of a MCML Gate Library Applying Multiobjective Optimization," isvlsi, pp.81-85, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), 2007

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