A Quantum Algorithm for Finding Minimum Exclusive-Or Expressions

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IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07)

Porto Alegre, Brazil

March 09-March 11

ISBN: 0-7695-2896-1

	ASCII Text	x
	M. Sampson, D. Voudouris, G. Papakonstantinou, "A Quantum Algorithm for Finding Minimum Exclusive-Or Expressions," VLSI, IEEE Computer Society Annual Symposium on, pp. 416-421, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), 2007.

	BibTex	x
	@article{ 10.1109/ISVLSI.2007.17, author = {M. Sampson and D. Voudouris and G. Papakonstantinou}, title = {A Quantum Algorithm for Finding Minimum Exclusive-Or Expressions}, journal ={VLSI, IEEE Computer Society Annual Symposium on}, volume = {0}, year = {2007}, isbn = {0-7695-2896-1}, pages = {416-421}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2007.17}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI, IEEE Computer Society Annual Symposium on TI - A Quantum Algorithm for Finding Minimum Exclusive-Or Expressions SN - 0-7695-2896-1 SP416 EP421 A1 - M. Sampson, A1 - D. Voudouris, A1 - G. Papakonstantinou, PY - 2007 KW - null VL - 0 JA - VLSI, IEEE Computer Society Annual Symposium on ER -

M. Sampson, National Technical University of Athens

D. Voudouris, National Technical University of Athens

G. Papakonstantinou, National Technical University of Athens

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2007.17

This paper presents a quantum algorithm for minimizing both Exlusive-or Sum of Complex Terms (ESCT) and Exlusive-or Sum of Products (ESOP) expressions. The proposed algorithm, QMin, takes advantage of the inherrent massive parallelism of quantum circuits. The ESCT expressions produced by QMin are presented in the related bibliography as an attractive architecture for implementing reversible and quantum circuits.

Citation:

M. Sampson, D. Voudouris, G. Papakonstantinou, "A Quantum Algorithm for Finding Minimum Exclusive-Or Expressions," isvlsi, pp.416-421, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), 2007

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