Space-Saving Layout for Passive Components

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	Similar Articles Articles by Paivi H. Karjalainen Articles by Pekka Heino

IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06)

Karlsruhe, Germany

March 02-March 03

ISBN: 0-7695-2533-4

	ASCII Text	x
	Paivi H. Karjalainen, Pekka Heino, "Space-Saving Layout for Passive Components," VLSI, IEEE Computer Society Annual Symposium on, pp. 117-121, IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06), 2006.

	BibTex	x
	@article{ 10.1109/ISVLSI.2006.84, author = {Paivi H. Karjalainen and Pekka Heino}, title = {Space-Saving Layout for Passive Components}, journal ={VLSI, IEEE Computer Society Annual Symposium on}, volume = {0}, year = {2006}, isbn = {0-7695-2533-4}, pages = {117-121}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2006.84}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI, IEEE Computer Society Annual Symposium on TI - Space-Saving Layout for Passive Components SN - 0-7695-2533-4 SP117 EP121 A1 - Paivi H. Karjalainen, A1 - Pekka Heino, PY - 2006 KW - null VL - 0 JA - VLSI, IEEE Computer Society Annual Symposium on ER -

Paivi H. Karjalainen, Tampere University of Technology, Institute of Electronics

Pekka Heino, Tampere University of Technology, Institute of Electronics

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2006.84

The large number of passive components in mobile electronics devices require a large area. In this study, the passive components on the test chip are processed using a commercial CMOS process. The layout area is reduced by superimposing the on-wafer passive components of the basic inductor-capacitor and inductor-resistor circuits. The resonant frequency of the LC circuit using the stacked components matches well with the calculated value of the reference components. The effect of the parasitic components between the stacked passive components is found negligible in the operating frequency range.

Citation:

Paivi H. Karjalainen, Pekka Heino, "Space-Saving Layout for Passive Components," isvlsi, pp.117-121, IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06), 2006

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