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IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06)
Si Nanocrystal MOSFET with Silicon Nitride Tunnel Insulator for High-rate Random Number Generation
Karlsruhe, Germany
March 02-March 03
ISBN: 0-7695-2533-4
ASCII Text
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Ryuji Ohba, Daisuke Matsushita, Koichi Muraoka, Shinichi Yasuda, Tetsufumi Tanamoto, Ken Uchida, Shinobu Fujita, "Si Nanocrystal MOSFET with Silicon Nitride Tunnel Insulator for High-rate Random Number Generation," VLSI, IEEE Computer Society Annual Symposium on, pp. 231-236, IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06), 2006.
 
 
BibTex
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@article{ 10.1109/ISVLSI.2006.83,
author = {Ryuji Ohba and Daisuke Matsushita and Koichi Muraoka and Shinichi Yasuda and Tetsufumi Tanamoto and Ken Uchida and Shinobu Fujita},
title = {Si Nanocrystal MOSFET with Silicon Nitride Tunnel Insulator for High-rate Random Number Generation},
journal ={VLSI, IEEE Computer Society Annual Symposium on},
volume = {0},
year = {2006},
isbn = {0-7695-2533-4},
pages = {231-236},
doi = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2006.83},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI, IEEE Computer Society Annual Symposium on
TI - Si Nanocrystal MOSFET with Silicon Nitride Tunnel Insulator for High-rate Random Number Generation
SN - 0-7695-2533-4
SP231
EP236
A1 - Ryuji Ohba,
A1 - Daisuke Matsushita,
A1 - Koichi Muraoka,
A1 - Shinichi Yasuda,
A1 - Tetsufumi Tanamoto,
A1 - Ken Uchida,
A1 - Shinobu Fujita,
PY - 2006
KW - null
VL - 0
JA - VLSI, IEEE Computer Society Annual Symposium on
ER -
 
Ryuji Ohba, Advanced LSI Technology Laboratory, Toshiba Corporation, Japan
Daisuke Matsushita, Advanced LSI Technology Laboratory, Toshiba Corporation, Japan
Koichi Muraoka, Advanced LSI Technology Laboratory, Toshiba Corporation, Japan
Shinichi Yasuda, Advanced LSI Technology Laboratory, Toshiba Corporation, Japan
Tetsufumi Tanamoto, Advanced LSI Technology Laboratory, Toshiba Corporation, Japan
Ken Uchida, Advanced LSI Technology Laboratory, Toshiba Corporation, Japan
Shinobu Fujita, Advanced LSI Technology Laboratory, Toshiba Corporation, Japan
It is shown that sub-0.1?m Si nanocrystal bulk MOSFET with thin SiN tunnel insulator is a very strong random noise source used in high-rate smallsize random number generation circuit, which is required for cryptograph application in mobile network security. A fast random number generation rate of 0.12 MHz is demonstrated using Si nanocrystal MOSFET and a simple small circuit. It is suggested that a small-size random number generator with MHz generation rate, which is applicable for almost all security uses in our computer society, is possible by Si nanocrystal MOSFET device design.
Citation:
Ryuji Ohba, Daisuke Matsushita, Koichi Muraoka, Shinichi Yasuda, Tetsufumi Tanamoto, Ken Uchida, Shinobu Fujita, "Si Nanocrystal MOSFET with Silicon Nitride Tunnel Insulator for High-rate Random Number Generation," isvlsi, pp.231-236, IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06), 2006
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