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IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06)
New non-volatile FPGA concept using Magnetic Tunneling Junction
Karlsruhe, Germany
March 02-March 03
ISBN: 0-7695-2533-4
Nicolas Bruchon, LIRMM, Cedex, France
Lionel Torres, LIRMM, Cedex, France
Gilles Sassatelli, LIRMM, Cedex, France
Gaston Cambon, LIRMM, Cedex, France
This paper describes a real time reconfigurable (RTR) micro- FPGA using new non volatile memory. Magnetic tunneling junctions (MTJ) used in Magnetic random access memories (MRAM) are compatible with classical CMOS processes. Moreover remanent property of such a memory could limit configuration time and power consumption required at each power up of the device. Each configuration memory point has to be readable independently from each other, which makes this approach radically different from the classical memory array one.
Citation:
Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon, "New non-volatile FPGA concept using Magnetic Tunneling Junction," isvlsi, pp.269-276, IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06), 2006
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