IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06)
Improving System Level Design Space Exploration by Incorporating SAT-Solvers into Multi-Objective Evolutionary Algorithms
Karlsruhe, Germany
March 02-March 03
ISBN: 0-7695-2533-4
Automatic design space exploration at the system level is the task of finding optimal or close to optimal mappings for a set of applications onto an optimized architecture. Especially, finding a feasible binding of processes onto resources that permit the communications imposed by data dependencies is known to be a N P-complete task which demands the use of heuristic optimization approaches. Nearly all optimization approaches known from literature will fail in design spaces containing only a few feasible solutions. In this paper, we propose a novel approach based on the combination of Multi-Objective Evolutionary Algorithms and SAT-solvers to overcome these drawbacks. We will provide experimental results showing the efficiency of our novel methodology for synthetic and real life test cases.
Citation:
Thomas Schlichter, Martin Lukasiewycz, Christian Haubelt, Jurgen Teich, "Improving System Level Design Space Exploration by Incorporating SAT-Solvers into Multi-Objective Evolutionary Algorithms," isvlsi, pp.309-316, IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06), 2006