Finite State Machine Implementation with Single-Electron Tunneling Technology

I
ISVLSI
2006
IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06)
Abstract - Finite State Machine Implementation with Single-Electron Tunneling Technology

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	Similar Articles Articles by Jialin Mi Articles by Chunhong Chen

IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06)

Karlsruhe, Germany

March 02-March 03

ISBN: 0-7695-2533-4

	ASCII Text	x
	Jialin Mi, Chunhong Chen, "Finite State Machine Implementation with Single-Electron Tunneling Technology," VLSI, IEEE Computer Society Annual Symposium on, pp. 237-241, IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06), 2006.

	BibTex	x
	@article{ 10.1109/ISVLSI.2006.45, author = {Jialin Mi and Chunhong Chen}, title = {Finite State Machine Implementation with Single-Electron Tunneling Technology}, journal ={VLSI, IEEE Computer Society Annual Symposium on}, volume = {0}, year = {2006}, isbn = {0-7695-2533-4}, pages = {237-241}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2006.45}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI, IEEE Computer Society Annual Symposium on TI - Finite State Machine Implementation with Single-Electron Tunneling Technology SN - 0-7695-2533-4 SP237 EP241 A1 - Jialin Mi, A1 - Chunhong Chen, PY - 2006 KW - null VL - 0 JA - VLSI, IEEE Computer Society Annual Symposium on ER -

Jialin Mi, University of Windsor, Ontario, Canada

Chunhong Chen, University of Windsor, Ontario, Canada

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2006.45

In this paper we propose an implementation technique for finite state machines using single-electron tunneling (SET) technology towards ultra-low power dissipation. We take an example from radio-frequency identification (RFID) systems, and implement the state machine based on single-electron encoded logic (SEEL). The circuit is simulated by SIMON (a simulator for SET circuits), and is compared favorably with its CMOS counterpart.

Citation:

Jialin Mi, Chunhong Chen, "Finite State Machine Implementation with Single-Electron Tunneling Technology," isvlsi, pp.237-241, IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06), 2006

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