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IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06)
Adaptive Porting of Analog IPs with Reusable Conservative Properties
Karlsruhe, Germany
March 02-March 03
ISBN: 0-7695-2533-4
Takashi Nojima, Jedat Innovation Inc., Japan
Nobuto Ono, Jedat Innovation Inc., Japan
Shigetoshi Nakatake, University of Kitakyushu, Japan
Toru Fujimura, University of Kitakyushu, Japan
Koji Okazaki, University of Kitakyushu, Japan
Yoji Kajitani, University of Kitakyushu, Japan
Analog layout automation is one of the most challenging subjects that has to cope with trade-offs among analog specific requirements such as noise, linearity, gain, supplyvoltage, speed, power consumption, etc. This paper proposes a novel porting methodology that guides the reuse of analog IPs, followed by an automation system. The methodology introduces a concept of conservative properties that are necessary and sufficient for the configuration of the high quality layout. The properties are extracted from schematics and the past layouts, and then are represented in terms of module configurations and topological constraints imposed on devices. In experiments, our porting system is applied to several industrial analog circuits. In the design of an A/D converter, we ported the layout on 0.20?m/3.3V technology to that on 0.18?m/1.8V technology. The result not only met the required performance, but also achieved the comparable quality with the manual layout. The design time was reduced drastically.
Citation:
Takashi Nojima, Nobuto Ono, Shigetoshi Nakatake, Toru Fujimura, Koji Okazaki, Yoji Kajitani, "Adaptive Porting of Analog IPs with Reusable Conservative Properties," isvlsi, pp.18-23, IEEE Computer Society Annual Symposium on VLSI: Emerging VLSI Technologies and Architectures (ISVLSI'06), 2006
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