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IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05)
Sensing Design Issues in Deep Submicron CMOS SRAMs
Tampa, Florida
May 11-May 12
ISBN: 0-7695-2365-X
ASCII Text
x 
 
Aiyappan Natarajan, Vijay Shankar, Atul Maheshwari, Wayne Burleson, "Sensing Design Issues in Deep Submicron CMOS SRAMs," VLSI, IEEE Computer Society Annual Symposium on, pp. 42-45, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05), 2005.
 
 
BibTex
x
 
@article{ 10.1109/ISVLSI.2005.67,
author = {Aiyappan Natarajan and Vijay Shankar and Atul Maheshwari and Wayne Burleson},
title = {Sensing Design Issues in Deep Submicron CMOS SRAMs},
journal ={VLSI, IEEE Computer Society Annual Symposium on},
volume = {0},
year = {2005},
isbn = {0-7695-2365-X},
pages = {42-45},
doi = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2005.67},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI, IEEE Computer Society Annual Symposium on
TI - Sensing Design Issues in Deep Submicron CMOS SRAMs
SN - 0-7695-2365-X
SP42
EP45
A1 - Aiyappan Natarajan,
A1 - Vijay Shankar,
A1 - Atul Maheshwari,
A1 - Wayne Burleson,
PY - 2005
KW - null
VL - 0
JA - VLSI, IEEE Computer Society Annual Symposium on
ER -
 
Aiyappan Natarajan, University of Massachusetts at Amherst
Vijay Shankar, University of Massachusetts at Amherst
Atul Maheshwari, University of Massachusetts at Amherst
Wayne Burleson, University of Massachusetts at Amherst
In this paper, solutions to memory design issues in nanometer CMOS are presented. First a comparative study between various sense-amplifiers is presented in 70nm CMOS technology. Impact of process variation is studied on the performance of these sense-amplifiers. An improved Bit-line leakage compensation scheme is proposed to ensure proper sensing in presence of leakage. Performance benefit of upto 68% can be obtained using this technique.
Citation:
Aiyappan Natarajan, Vijay Shankar, Atul Maheshwari, Wayne Burleson, "Sensing Design Issues in Deep Submicron CMOS SRAMs," isvlsi, pp.42-45, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05), 2005
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