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IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05)
Evaluating the Data Integrity of Memory Systems by Configurable Markov Models
Tampa, Florida
May 11-May 12
ISBN: 0-7695-2365-X
M. Ottavi, Northeastern University Boston
L. Schiano, Northeastern University Boston
F. Lombardi, Northeastern University Boston
S. Pontarelli, University of Rome
G. C. Cardarilli, University of Rome
In this paper, a novel method for the evaluation of the Bit Error Rate (BER) as measure for assessing data integrity in memory systems is proposed; such method improves modeling by introducing configurability features in the Markov chains to account for environmental and operational changes. For modeling erasures and random errors, the occurrence of new time-varying features is introduced in the analysis to characterize the behavior of memory systems for space applications (using Reed-Solomon codes as EDAC). Moreover, differently from existing techniques, the nature of these features (such as scrubbing and the effects of the so-called South Atlantic Anomaly on SEU rates) is assessed using a deterministic framework.
Citation:
M. Ottavi, L. Schiano, F. Lombardi, S. Pontarelli, G. C. Cardarilli, "Evaluating the Data Integrity of Memory Systems by Configurable Markov Models," isvlsi, pp.257-259, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05), 2005
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