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IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05)
Boost Logic: A High Speed Energy Recovery Circuit Family
Tampa, Florida
May 11-May 12
ISBN: 0-7695-2365-X
Visvesh S. Sathe, University of Michigan
Marios C. Papaefthymiou, University of Michigan
Conrad H. Ziesler, MultiGig Inc.
In this paper, we propose Boost Logic, a logic family which relies on voltage scaling, gate overdrive, and energy recovery techniques to achieve high energy efficiency at frequencies in the GHz range. The key feature of our design is the use of an energy recovering "boost" stage to provide an efficient gate overdrive to a highly voltage-scaled logic at near-threshold supply voltage. We have evaluated our logic family using simulation results from an 8-bit carry-save multiplier in a 0.13µm CMOS process with V_th=340mV. At 1.4GHz and a 1.1V supply voltage, the Boost multiplier dissipates 3.44pJ per computation, achieving 57% energy savings with respect to its static CMOS counterpart. Using low V_th devices, Boost Logic has been verified to operate at 2GHz with a 1.2V voltage supply and 3.76pJ energy dissipation per cycle.
Citation:
Visvesh S. Sathe, Marios C. Papaefthymiou, Conrad H. Ziesler, "Boost Logic: A High Speed Energy Recovery Circuit Family," isvlsi, pp.22-27, IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05), 2005
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