Concurrent Pseudo-Exhaustive Testing of Combinational VLSI Circuits

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IEEE Computer Society Annual Symposium on VLSI: Emerging Trends in VLSI Systems Design (ISVLSI'04)

Concurrent Pseudo-Exhaustive Testing of Combinational VLSI Circuits (PDF)

Lafayette, Louisiana

February 19-February 20

ISBN: 0-7695-2097-9

	ASCII Text	x
	B. Shaer, "Concurrent Pseudo-Exhaustive Testing of Combinational VLSI Circuits," VLSI, IEEE Computer Society Annual Symposium on, pp. 289, IEEE Computer Society Annual Symposium on VLSI: Emerging Trends in VLSI Systems Design (ISVLSI'04), 2004.

	BibTex	x
	@article{ 10.1109/ISVLSI.2004.1339560, author = {B. Shaer}, title = {Concurrent Pseudo-Exhaustive Testing of Combinational VLSI Circuits}, journal ={VLSI, IEEE Computer Society Annual Symposium on}, volume = {0}, year = {2004}, isbn = {0-7695-2097-9}, pages = {289}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2004.1339560}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI, IEEE Computer Society Annual Symposium on TI - Concurrent Pseudo-Exhaustive Testing of Combinational VLSI Circuits SN - 0-7695-2097-9 SP EP A1 - B. Shaer, PY - 2004 KW - null VL - 0 JA - VLSI, IEEE Computer Society Annual Symposium on ER -

B. Shaer, UMD

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2004.1339560

Partitioning and concurrent pseudo-exhaustive test scheme has been proposed as a powerful solution to very large scale integrated (VLSI) testing problem. Pseudo-exhaustive test methodology provides effective, 100% fault coverage for all testable stuck-at faults. After partitioning the ISCAS?85 benchmark circuits, results were processed and studied to develop a procedure for concurrent testing. Tools written in C/C++ to process benchmark circuits and to produce sets of primary outputs and partitioned points that can be tested concurrently were developed.

Citation:

B. Shaer, "Concurrent Pseudo-Exhaustive Testing of Combinational VLSI Circuits," isvlsi, pp.289, IEEE Computer Society Annual Symposium on VLSI: Emerging Trends in VLSI Systems Design (ISVLSI'04), 2004

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