AN AREA-EFFICIENT EUCLIDEAN ALGORITHM BLOCK FOR REED-SOLOMON DECODER

I
ISVLSI
2003
IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03)
Abstract - AN AREA-EFFICIENT EUCLIDEAN ALGORITHM BLOCK FOR REED-SOLOMON DECODER

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IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03)

AN AREA-EFFICIENT EUCLIDEAN ALGORITHM BLOCK FOR REED-SOLOMON DECODER (PDF)

Tampa, Florida

February 20-February 21

ISBN: 0-7695-1904-0

	ASCII Text	x
	Hanho Lee, "AN AREA-EFFICIENT EUCLIDEAN ALGORITHM BLOCK FOR REED-SOLOMON DECODER," VLSI, IEEE Computer Society Annual Symposium on, pp. 209, IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03), 2003.

	BibTex	x
	@article{ 10.1109/ISVLSI.2003.1183468, author = {Hanho Lee}, title = {AN AREA-EFFICIENT EUCLIDEAN ALGORITHM BLOCK FOR REED-SOLOMON DECODER}, journal ={VLSI, IEEE Computer Society Annual Symposium on}, volume = {0}, year = {2003}, isbn = {0-7695-1904-0}, pages = {209}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2003.1183468}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI, IEEE Computer Society Annual Symposium on TI - AN AREA-EFFICIENT EUCLIDEAN ALGORITHM BLOCK FOR REED-SOLOMON DECODER SN - 0-7695-1904-0 SP EP A1 - Hanho Lee, PY - 2003 KW - null VL - 0 JA - VLSI, IEEE Computer Society Annual Symposium on ER -

Hanho Lee, University of Connecticut

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2003.1183468

This paper presents a new area-efficient architrecture to implement the Euclidean algorithm, which is frequently used in Reed-Solomon decoders. The RS (255,239) decoder using the Euclidean algorithm has been implemented with 0.13-?m CMOS technology with a supply voltage of 1.1V. We investigate hardware complexity, clock frequency and data processing rate for this Euclidean algorithm block. The results show that the total number of gates is about 44,700 and it has a data processing rate of 2.4 Gbits/s at a lock frequency of 300 MHz. As compared to the other RS decoders, it gains significant improvements in hardware complexity and latency.

Citation:

Hanho Lee, "AN AREA-EFFICIENT EUCLIDEAN ALGORITHM BLOCK FOR REED-SOLOMON DECODER," isvlsi, pp.209, IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03), 2003

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