An Implementation of a 32-bit ARM Processor Using Dual Power Supplies and Dual Threshold Voltages

I
ISVLSI
2003
IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03)
Abstract - An Implementation of a 32-bit ARM Processor Using Dual Power Supplies and Dual Threshold Voltages

	This Article
	Subscribers, please Login Purchase article: $19 PDF IEEE Xplore Subscribers RSS feed
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Robert Bai Articles by Sarvesh Kulkarni Articles by Wesley Kwong Articles by Ashish Srivastava Articles by Dennis Sylvester Articles by David Blaauw

IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03)

Tampa, Florida

February 20-February 21

ISBN: 0-7695-1904-0

	ASCII Text	x
	Robert Bai, Sarvesh Kulkarni, Wesley Kwong, Ashish Srivastava, Dennis Sylvester, David Blaauw, "An Implementation of a 32-bit ARM Processor Using Dual Power Supplies and Dual Threshold Voltages," VLSI, IEEE Computer Society Annual Symposium on, pp. 149, IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03), 2003.

	BibTex	x
	@article{ 10.1109/ISVLSI.2003.1183366, author = {Robert Bai and Sarvesh Kulkarni and Wesley Kwong and Ashish Srivastava and Dennis Sylvester and David Blaauw}, title = {An Implementation of a 32-bit ARM Processor Using Dual Power Supplies and Dual Threshold Voltages}, journal ={VLSI, IEEE Computer Society Annual Symposium on}, volume = {0}, year = {2003}, isbn = {0-7695-1904-0}, pages = {149}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2003.1183366}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI, IEEE Computer Society Annual Symposium on TI - An Implementation of a 32-bit ARM Processor Using Dual Power Supplies and Dual Threshold Voltages SN - 0-7695-1904-0 SP EP A1 - Robert Bai, A1 - Sarvesh Kulkarni, A1 - Wesley Kwong, A1 - Ashish Srivastava, A1 - Dennis Sylvester, A1 - David Blaauw, PY - 2003 KW - Low power design KW - ARM processor KW - CVS KW - Dual-V<sub>t</sub> VL - 0 JA - VLSI, IEEE Computer Society Annual Symposium on ER -

Robert Bai, University of Michigan

Sarvesh Kulkarni, University of Michigan

Wesley Kwong, University of Michigan

Ashish Srivastava, University of Michigan

Dennis Sylvester, University of Michigan

David Blaauw, University of Michigan

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2003.1183366

With the explosion of portable electronic devices, power efficient processors have become increasingly important. In this paper we present a set of circuit techniques to implement a 32-bit low-power ARM processor, found commonly in embedded systems, using a six metal layer 0.18 ?m TSMC process. Our methodology is based on Clustered Voltage Scaling (CVS) and dual-V_th techniques aiming to reduce both dynamic power and static power simultaneously.

Index Terms:

Low power design, ARM processor, CVS, Dual-V<sub>t</sub>

Citation:

Robert Bai, Sarvesh Kulkarni, Wesley Kwong, Ashish Srivastava, Dennis Sylvester, David Blaauw, "An Implementation of a 32-bit ARM Processor Using Dual Power Supplies and Dual Threshold Voltages," isvlsi, pp.149, IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03), 2003

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.