IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03) Networks-On-Chip:The Quest for On-Chip Fault-Tolerant Communication Tampa, Florida February 20-February 21 ISBN: 0-7695-1904-0
In this paper, we discuss the possibility of achieving on- chip fault-tolerant communication based on a new communication paradigm called stochastic communication.Specifically, for a generic tile-based architecture, we present a randomized algorithm which not only separates computation from communication, but also provides the required fault-tolerance to on-chip failures.This new technique is easy and cheap to implement in SoCs that integrate a large number of communicating IP cores.
Citation:
Radu Marculescu, "Networks-On-Chip:The Quest for On-Chip Fault-Tolerant Communication," isvlsi, pp.8, IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03), 2003 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||