Proceedings of the 15th international symposium on System Synthesis (ISSS '02) A Trimaran Based Framework for Exploring the Design Space of VLIW ASIPs with Coarse Grain Functional Units Kyoto, Japan October 02-October 04 ISBN: 1-58113-576-9
It is widely accepted that use of an Application Specific Instruction Set Processor (ASIP) in an embedded system can provide a solution which is much more flexible than ASICs and much more efficient than standard processors in terms of performance and power consumption. However a lack of an acceptable design methodology and supporting tools for ASIPs limits their use even today. We present in this paper a methodology for design space exploration of high performance VLIW ASIPs by modeling Application Specific Functional Units in Trimaran Compiler Infrastructure. To demonstrate the effectiveness of our strategy we consider two important applications FFT and Kalman Filter and perform compute intensive operations in these applications via special Functional Units. The results we obtain are very promising with up to 2x speed improvement.
Index Terms:
ASIP, Trimaran, VLIW, design space exploration, performance
Citation:
M. Balakrishnan, Anshul Kumar, Paolo Ienne, Anup Gangwar, Bhuvan Middha, "A Trimaran Based Framework for Exploring the Design Space of VLIW ASIPs with Coarse Grain Functional Units," isss, pp.2-7, Proceedings of the 15th international symposium on System Synthesis (ISSS '02), 2002 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||