9th International Symposium on Quality Electronic Design (isqed 2008) Embedded Deterministic Test Exploiting Care Bit Clustering and Seed Borrowing March 17-March 19 ISBN: 978-0-7695-3117-5
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISQED.2008.65
Embedded deterministic test is a manufacture test paradigm that combines the compression advantage of built-in self-test with the high fault coverage of deterministic stimuli, inherent to methods based on automatic test pattern generation and external testers. Despite enabling the use of low-cost testers for rapidly achieving high fault coverage, embedded deterministic test must consciously use the available tester channel bandwidth to ensure non-disruptive scaling to future devices of increased complexity. The focus of this paper is to show how exploitation of care bit clustering in a test set combined with a low cost implementation for on-chip decompressors based on seed borrowing, facilitates an increased utilization of the tester channel bandwidth, and hence improved compression of deterministic stimuli.
Index Terms:
design-for-testability, test data compression
Citation:
Adam B. Kinsman, Nicola Nicolici, "Embedded Deterministic Test Exploiting Care Bit Clustering and Seed Borrowing," isqed, pp.832-837, 9th International Symposium on Quality Electronic Design (isqed 2008), 2008 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||