9th International Symposium on Quality Electronic Design (isqed 2008)
Generic Carrier-Based Core Model for Four-Terminal Double-Gate MOSFET Valid for Symmetric, Asymmetric, SOI, and Independent Gate Operation Modes
March 17-March 19
ISBN: 978-0-7695-3117-5
A generic carrier-based core model for undoped four-terminal double-gate (DG) MOSFET valid for symmetric, asymmetric, SOI, and independent gate operation modes is presented in this paper. Based on the exact solution of the 1-D Poisson’s equation of a general DG-MOSFET configure, a generic drain current model is derived from Pao-Sah’s double integral in terms of the carrier concentration. The model is verified by extensive comparisons with 2-D numerical simulations under different bias conditions to all four terminals. The concise mathematic formulation allows the unification various double-gate models into a carrier-based core model for compact DG-MOSFET model development.
Index Terms:
double-gate MOSFET, compact model, drain current
Citation:
Feng Liu, Jin He, Yue Fu, Jinhua Hu, Wei Bian, Yan Song, Xing Zhang, Mansun Chan, "Generic Carrier-Based Core Model for Four-Terminal Double-Gate MOSFET Valid for Symmetric, Asymmetric, SOI, and Independent Gate Operation Modes," isqed, pp.271-276, 9th International Symposium on Quality Electronic Design (isqed 2008), 2008