Design for manufacturability and yield has becomes a major issue for advanced VLSI technology nodes. The demand for a yield prediction capability has been growing significantly. Unfortunately,systematic yield prediction and analysis is still behind in both research and availability of commercial tools. A major reason for that is the high dependency of such research on hard to come by data from fabs. Thus a new approach that limits this dependency is needed. In this paper, we propose a novel and practical approach that enables systematic yield prediction with limited fab information and data. This approach is based on the information of hotspot definitions and their yield scores. The required inputs are more practical and realistic and less confidential. The dependency on the fab data is minimal. In this approach, we propose an algorithm that properly incorporates spatial correlations between yield variables when computing full chip total yield. The predicted total yield score is accurate and robust. We further demonstrate the high level of accuracy by both theory and simulation.