9th International Symposium on Quality Electronic Design (isqed 2008) A High-Performance Bus Architecture for Strongly Coupled Interconnects March 17-March 19 ISBN: 978-0-7695-3117-5
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISQED.2008.21
Coupling and increasing wire resistance on interconnect fabrics undermine the speed of the transient electrical signals. A brute-force approach for a crosstalk-reduced design relies on increasing the distance of interconnects from each other and using additional repeated logic. A pipelined bus-architecture exploiting the existing electrical noise is proposed. Process variations are taken into consideration in the analysis. The proposed technique is validated for the 65nm and 90nm CMOS processes for interconnects of various lengths.
Index Terms:
high-speed bus, crosstalk
Citation:
Michael N. Skoufis, Kedar Karmarkar, Themistoklis Haniotakis, Spyros Tragoudas, "A High-Performance Bus Architecture for Strongly Coupled Interconnects," isqed, pp.407-410, 9th International Symposium on Quality Electronic Design (isqed 2008), 2008 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||