9th International Symposium on Quality Electronic Design (isqed 2008) Noise-Aware On-Chip Power Grid Considerations Using a Statistical Approach March 17-March 19 ISBN: 978-0-7695-3117-5
We analyze the correlation between different parameters of the on-chip power distribution grid and their impact on noise. By using factor analysis we are able to uncover correlations between power grid design variables and power supply noise. We derive the correlation between design variables and noise from an analysis of 300 different grids in a 65-nm process technology, and manage to find the impact that a change in power grid design variables will have on noise. The results from this analysis can be used as guidelines when designing a robust power distribution grid.
Index Terms:
Power supply, design considerations, noise
Citation:
Daniel A. Andersson, Lars J. Svensson, Per Larsson-Edefors, "Noise-Aware On-Chip Power Grid Considerations Using a Statistical Approach," isqed, pp.663-669, 9th International Symposium on Quality Electronic Design (isqed 2008), 2008 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||