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9th International Symposium on Quality Electronic Design (isqed 2008)
Characterizing the Impact of Substrate Noise on High-Speed Flash ADCs
March 17-March 19
ISBN: 978-0-7695-3117-5
A 4-bit flash ADC is investigated in presence of substrate noise generated by switching activities in digital blocks. The impact of noise is analyzed in different building blocks of the ADC and is measured experimentally using a high-speed ADC test block fabricated in a 0.18-μm SiGe BiCMOS process. Measurement results show that noise spikes in the substrate cause distortion in the prototype ADC and degrade its SNDR by 2 dB (10%) at noise frequencies above 200 MHz.
Index Terms:
flash ADC, comparator, substrate noise, SNR
Citation:
Parastoo Nikaeen, Boris Murmann, Robert W. Dutton, "Characterizing the Impact of Substrate Noise on High-Speed Flash ADCs," isqed, pp.396-400, 9th International Symposium on Quality Electronic Design (isqed 2008), 2008
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