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9th International Symposium on Quality Electronic Design (isqed 2008)
Analytical Model for the Propagation Delay of Through Silicon Vias
March 17-March 19
ISBN: 978-0-7695-3117-5
This paper explores the modeling of the propagation delay of through silicon vias (TSVs) in 3D integrated circuits. The electrical characteristics and models of the TSVs are very crucial in enabling the analysis and CAD in 3D integrated circuits. In this paper, an analytical model for the propagation delay of the TSV as a function of its physical dimensions is proposed. The presented analytical model is in great agreement with simulations using electromagnetic field solver and lossy transmission line circuit model. Compared to earlier interconnect models, the presented analytical model provides higher accuracy and fidelity in addition to its simplicity. Hence, the presented analytical model is very useful in the analysis of 3D integrated circuits.
Index Terms:
TSV, 3D integrated circuits, propagation delay model, dimensional analysis
Citation:
DiaaEldin Khalil, Yehea Ismail, Muhammad Khellah, Tanay Karnik, Vivek De, "Analytical Model for the Propagation Delay of Through Silicon Vias," isqed, pp.553-556, 9th International Symposium on Quality Electronic Design (isqed 2008), 2008
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