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8th International Symposium on Quality Electronic Design (ISQED'07)
Design and Analysis of "Tree+Local Meshes" Clock Architecture
San Jose, California
March 26-March 28
ISBN: 0-7695-2795-7
Gustavo R. Wilke, Fujitsu Laboratories of America, Inc., USA
Rajeev Murgai, Fujitsu Laboratories of America, Inc., USA
A clock architecture with single mesh driven by a tree has been shown to achieve very small skew. However, it is expensive to employ clock gating in such a structure to save power. A clock architecture with multiple meshes has the advantage of allowing the clock to be switched off independently to design blocks and thus saving clock power. In this paper, we propose a practical design flow to synthesize and analyze an architecture with multiple meshes driven by a tree. We show that using our synthesis method, this architecture is able to achieve on a real industrial design smaller skew than a tree (10.08ps vs. 29.29ps), but slightly worse skew than a single equivalent mesh (10.08ps vs. 4ps). We also study the impact of tree and mesh sizes on the maximum skew. In general, the maximum skew reduces if the tree has more sinks. The overall conclusion of our study is that the multiple-mesh architecture offers significant advantages both over a pure mesh -- lower power and faster analysis, at the expense of slightly worse skew, and over a tree -- smaller skew and more robustness to parameter variations.
Citation:
Gustavo R. Wilke, Rajeev Murgai, "Design and Analysis of "Tree+Local Meshes" Clock Architecture," isqed, pp.165-170, 8th International Symposium on Quality Electronic Design (ISQED'07), 2007
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