A programmable frequency divider, designed to mitigate radiation-induced Single Event Upsets (SEU), is proposed. The circuit is immune to both SEUs from storage circuits and those induced by Single Event Transient (SET) from combinational logic. The SEU immunity of storage element is achieved by constructing the element with a novel SEU-hardened latch which doesn?t need transistor sizing to be functional and SEU-tolerant. SET tolerance is achieved by making full use of the existing parts and producing further necessary redundancies. The proposed structures are implemented and simulated using a standard 0.18?m logic process model. Simulation results show that the proposed frequency divider works correctly when attacked as well as during normal operations, with acceptable area and power overhead.