Static linearity test of \Sigma \Delta analog-to-digital converters (ADCs) imposes stringent requirement on the precision of test signals and leads to excessive test time. Consequently, ADC test remains as a bottleneck to the product development and contributes significantly to the devolvement cost. In this paper, a cost-effective linearity test and diagnosis methodology is presented for \Sigma \Delta ADCs with multi-bit internal DACs. Frequency-domain nonlinear circuit analysis is employed to systematically establish the connection between the static linearity measure (INL) and its frequency domain counterpart (harmonic distortions (HDs)), making it possible to predict INL using much simpler HD measurements. Furthermore, it is shown that the same simple HD measurements can be employed to accurately predict capacitor mismatch of internal multi-bit DACs, which is the main source of ADC nonlinearity. The efficacy of the proposed techniques is demonstrated by successful construction of accurate simulation-based INL and capacitor mismatch prediction models which are also compared against with closedform models resulted directly from our circuit analysis.