This paper presents a low-power LDPC decoder design based on speculative scheduling of energy necessary to decode dynamically varying data frame in fading channels. The proposed scheme pre-analyzes each received data frame to estimate the maximum number of necessary iterations for the frame convergence. The results are then used to dynamically adjust decoder frequency and switch between multiple-voltage levels; thereby energy use is minimized. This is in contrast to the conventional fixed-iteration decoding schemes that operates at a fixed voltage level regardless the quality of data received. The result is a decoder implementation that provides a judicious trade-off between power consumption and coding gain.