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8th International Symposium on Quality Electronic Design (ISQED'07)
Multi-Dimensional Circuit and Micro-Architecture Level Optimization
San Jose, California
March 26-March 28
ISBN: 0-7695-2795-7
Zhenyu (Jerry) Qi, University of Virginia, USA
Matthew Ziegler, IBM, T.J. Watson Research Center, USA
Stephen V. Kosonocky, IBM, T.J. Watson Research Center, USA
Jan M. Rabaey, University of California at Berkeley, USA
Mircea R. Stan, University of Virginia, USA
This paper studies multi-dimensional optimization at both circuit and micro-architecture levels. By formulating and solving the optimization problem with conflicting design objectives and multiple tunable knobs, it is revealed that the ?sensitivity balance? strategy proposed in recent works for performance-energy optimization is a special case of a general multi-dimensional optimization framework. The results derived in this paper help the understanding of efficient trade-off among multiple design objectives with multiple knobs. The example of an industrial control logic implemented in PLA shows 22% energy saving and 70% area reduction at the expense of 4% delay increase.
Citation:
Zhenyu (Jerry) Qi, Matthew Ziegler, Stephen V. Kosonocky, Jan M. Rabaey, Mircea R. Stan, "Multi-Dimensional Circuit and Micro-Architecture Level Optimization," isqed, pp.275-280, 8th International Symposium on Quality Electronic Design (ISQED'07), 2007
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